AIC Challenge
Fine-tuned YOLOv8m that detects the two connector ports on the task board of the AI for Industry Challenge cable-insertion task (UR5e inserts a cable plug into a randomised task-board port).
Model source
- Kind
- Other
- File size
- 49.6 MB
- Version
- vRevision 7236e07
- Updated
- Oct 21, 2026
- Downloads
- 7
- Source
- Hugging Face
Source description
AIC port detector — fine-tuned YOLOv8m (sfp_port / sc_port)
Fine-tuned YOLOv8m that detects the two connector ports on the task board of the AI for Industry Challenge cable-insertion task (UR5e inserts a cable plug into a randomised task-board port).
This is the only learned component in our solution. Everything downstream of it — board pose, port lock, approach, and the force-controlled seat — is geometric.
Classes
| id | name | description |
|---|---|---|
| 0 | sfp_port | SFP cage opening on a NIC card (two per card, 21.8 mm apart) |
| 1 | sc_port | SC fibre port on an SC rail module |
Note the base yolov8m.pt has an 80-class COCO head; this checkpoint has a custom
2-class head and is not interchangeable with a stock checkpoint.
Training
| base | yolov8m.pt (stock ultralytics) |
| data | sangramrout/AIC_Challenge — 11,452 train / 905 val |
| epochs | 50 |
| ultralytics | 8.4.90 |
Training data is synthetic — rendered from the challenge's Gazebo simulation (RGB from the left/center/right scene cameras), not real photographs.
Usage
from ultralytics import YOLO
model = YOLO("best_final.pt")
res = model.predict(image_bgr, conf=0.25)[0] # image at native 1024x1152
for cls, xywh in zip(res.boxes.cls.int().tolist(), res.boxes.xywh.tolist()):
print(["sfp_port", "sc_port"][cls], xywh) # box centre -> back-project to the board plane
In our pipeline the box centre is back-projected onto the board's CAD z-plane, then gated to the target module before averaging — see Known pitfall below.
Known pitfall — gate before you average
The detector fires on every port on the board, not just the target. The eval scene spawns three SC modules and multiple NIC cards, so taking a median over all detections of a class averages across distractor modules and lands the estimate tens of millimetres from the true port (we measured 58 mm on SC this way).
Select the target module first (we gate by board-frame Y), then take the robust median of the survivors. That single change took our SC port lock from 58 mm → 2 mm, with no change to the detector.
Links
- Code: https://github.com/skr3178/aic
- Dataset: https://huggingface.co/datasets/sangramrout/AIC_Challenge
License
AGPL-3.0, inherited from Ultralytics YOLOv8.
Sources
1 source
Sources
1 sourceVerified Oct 21
Model artifacts
1 artifact
Model artifacts
1 artifactSource excerpts
3 excerpts
Source excerpts
3 excerpts--- license: agpl-3.0 library_name: ultralytics tags: - object-detection - yolov8 - robotics - cable-insertion - ai-for-industry-challenge datasets: - sangramrout/AIC_Challenge pipeline_tag: object-detection --- # AIC port detector — fine-tuned YOLOv8m (`sfp_port` / `sc_port`) Fine-tuned **YOLOv8m** that detects the two connector ports on the task board of the [AI for Industry Challenge](https://www.intrinsic.ai/events/ai-for-industry-challenge) cable-insertion task (UR5e inserts a cable plug into a randomised task-board port). This is the **only learned component** in our solution. Everything downstream of it — board pose, port lock, approach, and the force-controlled seat — is geometric. ## Classes | id | name | description | |---|---|---| | 0 | `sfp_port` | SFP cage opening on a NIC card (two per card, 21.8 mm apart) | | 1 | `sc_port` | SC fibre port on an SC rail module | Note the base `yolov8m.pt` has an 80-class COCO head; this checkpoint has a **custom 2-class head** and is not interchangeable with a stock checkpoint. ## Training | | | |---|---| | base | `yolov8m.pt` (stock ultralytics) | | data | [`sangramrout/AIC_Challenge`](https://huggingface.co/datasets/sangramrout/AIC_Challenge) — 11,452 train / 905 val | | epochs | 50 | | ultralytics | 8.4.90 | Training data is **synthetic** — rendered from the challenge's Gazebo simulation (RGB from the left/center/right scene cameras), not real photographs. ## Usage ```python from ultralytics import YOLO model = YOLO("best_final.pt") res = model.predict(image_bgr, conf=0.25)[0] # image at native 1024x1152 for cls, xywh in zip(res.boxes.cls.int().tolist(), res.boxes.xywh.tolist()): print(["sfp_port", "sc_port"][cls], xywh) # box centre -> back-project to the board plane ``` In our pipeline the box centre is back-projected onto the board's CAD z-plane, then gated to the **target module** before averaging — see *Known pitfall* below. ## Known pitfall — gate before you average The detector fires on **every** port on the board, not just the target. The eval scene spawns **three** SC modules and multiple NIC cards, so taking a median over all detections of a class averages *across distractor modules* and lands the estimate tens of millimetres from the true port (we measured **58 mm** on SC this way). Select the target module first (we gate by board-frame Y), *then* take the robust median o...
Source context: 7 downloads · 0 likes · Pipeline object-detection · Library ultralytics · Repo sangramrout/AIC_Challenge
Source context: 26 downloads · 0 likes · Pipeline object-detection · Library ultralytics · Repo sangramrout/AIC_Challenge
